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33FJ64GP802 Audio DAC clock problem

 
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mkent



Joined: 09 Sep 2003
Posts: 37
Location: TN, USA

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33FJ64GP802 Audio DAC clock problem
PostPosted: Thu Jun 09, 2011 5:06 pm     Reply with quote

I am using the Audio DAC on the '802 to create a minimum shift keying modulation of 2400 Hz and 3600 Hz.

The auxiliary oscillator setup is found in the Oscillator part 3 of the dsPIC33F Family Ref. Manual.
crystal = 7.3728 Mhz, N1 /2 = 3.6864 Mhz, M x48 = 176.9472 Mhz (Fvco)

Fvco is selected as the Aux Osc
176.9472 / 8 = 22.1184 Mhz ACLK
DAC clock = 22.1184 / 256 = 86.4 Khz

I measure 43.2 Khz as my DAC clock and have checked the setup many times.

The code isn't very long so I'll post it all.

Code:

//INCLUDES -------------------------------------------------------------------------------------//
   #include <CaveRoverControl.h>
   #include <math.h>
   #include <stdio.h>

//DEFINES --------------------------------------------------------------------------------------//

   

//--INPUTS -------------------------------------------------------------------------------------//



//--OUTPUTS ------------------------------------------------------------------------------------//
//   #define DAC1LN_MSK    PIN_A3                    //DAC left channel negitive output
//   #define DAC1LP_MSK    PIN_A4                    //DAC left channel positive output


//--REGISTERS ----------------------------------------------------------------------------------//
//   Oscillator
   #word OSCCON = 0x0742                     //Oscillator control register
   #word CLKDIV = 0x0744                     //Oscillator clock control
   #word PLLFBD = 0x0746                     //PLL feedback
   #word ACLKCON = 0x074A                          //Aux clock control register address

//   DAC
   #word DAC1CON = 0x03F0                          //DAC control register
   #word DAC1STAT = 0x03F2                         //DAC status and control register
   #word DAC1DFLT = 0x03F4                     //DAC default register
   #bit  LEMPTY  = 0x03F2.8                      //Left channel input buffer empty bit   

//--CONSTANTS ----------------------------------------------------------------------------------//


//GLOBAL VARIABLES -----------------------------------------------------------------------------//

   int16 MotorCntlLeft, MotorCntlRight, AuxCntlWord;

//--ARRAYS -------------------------------------------------------------------------------------//
/*
rom int16 SineTable[72] = {0x8000,0x8b27,0x963a,0xa120,0xabc7,0xb618,0xc000,0xc96a,0xd246,
                           0xda82,0xe20d,0xe8d9,0xeed9,0xf401,0xf847,0xfba3,0xfe0e,0xff83,
                           0xffff,0xff83,0xfe0e,0xfba3,0xf847,0xf401,0xeed9,0xe8d9,0xe20d,
                           0xda82,0xd246,0xc96a,0xc000,0xb618,0xabc7,0xa120,0x963a,0x8b27,
                           0x8000,0x74d8,0x69c5,0x5edf,0x5438,0x49e7,0x4000,0x3695,0x2db9,
                           0x257d,0x1df2,0x1726,0x1126,0x0bfe,0x07b8,0x045c,0x01f1,0x007c,
                           0x0000,0x007c,0x01f1,0x045c,0x07b8,0x0bfe,0x1126,0x1726,0x1df2,
                           0x257d,0x2db9,0x3695,0x4000,0x49e7,0x5438,0x5edf,0x69c5,0x74d8};
*/
rom int16 SineTable[36] = {0x8000,0x963a,0xabc7,0xc000,0xd246,0xe20d,0xeed9,0xf847,0xfe0e,
                     0xffff,0xfe0e,0xf847,0xeed9,0xe20d,0xd246,0xc000,0xabc7,0x963a,
                           0x8000,0x69c5,0x5438,0x4000,0x2db9,0x1df2,0x1126,0x07b8,0x01f1,
                           0x0000,0x01f1,0x07b8,0x1126,0x1df2,0x2db9,0x4000,0x5438,0x69c5,};

//FUNCTION PROTOTYPES --------------------------------------------------------------------------//

//void Rover_Control_Xmit()


//INTERRUPTS -----------------------------------------------------------------------------------//



//Subroutines ----------------------------------------------------------------------------------//
void Rover_Control_Xmit()
{
   int16 RoverCntlData[3];
      RoverCntlData[0] = MotorCntlLeft;
      RoverCntlData[1] = MotorCntlRight;
      RoverCntlData[2] = AuxCntlWord;

   int8 wd=0;
   int16 DataWord;

      int8 bt=0;
      int1 DataBit;

         int8 ArrayIncr = 2;
          int8 i=0;
         int16  *ptr, ptrMax;

          ptr = &SineTable;
         ptrMax = ptr + 36;


   for(wd=0; wd<3; wd++)
   {
      DataWord = RoverCntlData[wd];

      for(bt=0; bt<10; bt++)
      {
         DataBit = shift_left(&DataWord,2,0);

         if(DataBit)
            ArrayIncr = 3;
         else
            ArrayIncr = 2;

          for(i=0; i<18; i++)
          {
              while(!LEMPTY);
            output_high(PIN_B13);
            dac_write(DAC_LEFT,*ptr);
              ptr = ptr + ArrayIncr;
            output_low(PIN_B13);
            if(ptr == ptrMax)
               ptr = ptr - 36;   
         }
      }     
   }
}

void main()
{
//   int1 VideoFieldSync=0;
//   int8 VideoFieldCount=0;
//   int1 pulse=0;

   ACLKCON = 0x0480;                  //ACLKCON control word for 22,118,380 Hz
//   PLLFBD = 0x002E;
   DAC1DFLT = 0x8000;                  //DAC default mid point

   setup_wdt(WDT_OFF);

   setup_timer1(TMR_DISABLED);
   setup_timer2(TMR_INTERNAL, TMR_DIV_BY_8);
   setup_timer3(TMR_INTERNAL);
   
   setup_adc_ports(sAN0 | sAN1);
   setup_adc(ADC_CLOCK_INTERNAL | ADC_TAD_MUL_31);

   setup_dac(DAC_LEFT_ON, 1);



// Main Code

    while (1)
   {
   output_high(PIN_B13);
   output_low(PIN_B13);

/*
   MotorCntlLeft= 0xfff0;
   MotorCntlRight = 0xfff0;
   AuxCntlWord = 0xfff0;

   if(!input(PIN_B5))
      {
      Rover_Control_Xmit();
      }
*/
   }
}


And the .h file



Code:
#include <33FJ64GP802.h>
#device ICD=TRUE
#device PSV=16

#FUSES NOWDT                    //No Watch Dog Timer
#FUSES NOWRTB                   //Boot block not write protected
#FUSES NOBSS                    //No boot segment
#FUSES NORBS                    //No Boot RAM defined
#FUSES NOWRTSS                  //Secure segment not write protected
#FUSES NOSSS                    //No secure segment
#FUSES NORSS                    //No secure segment RAM
#FUSES NOPROTECT                //Code not protected from reading
#FUSES PR_PLL                   //Primary Oscillator with PLL
#FUSES NOIESO                   //Internal External Switch Over mode disabled
#FUSES XT                       //Crystal osc <= 4mhz for PCM/PCH , 3mhz to 10 mhz for PCD
#FUSES NOOSCIO                  //OSC2 is clock output
#FUSES NOIOL1WAY                //Allows multiple reconfigurations of peripheral pins
#FUSES NOCKSFSM                 //Clock Switching is disabled, fail Safe clock monitor is disabled
#FUSES WPOSTS16                 //Watch Dog Timer PostScalar 1:32768
#FUSES WPRES128                 //Watch Dog Timer PreScalar 1:128
#FUSES NOWINDIS                 //Watch Dog Timer in Window mode
#FUSES PUT128                   //Power On Reset Timer value 128ms
#FUSES NOALTI2C                 //I2C mapped to alternate pins
#FUSES ICSP1                    //ICD uses PGC1/PGD1 pins
#FUSES NOJTAG                   //JTAG disabled
#FUSES DEBUG                    //Debug mode for use with ICD

#use delay(clock=44236800,crystal=7372800)



I am using PCD v4.121 with MPLAB v 8.63 and RealICE

I got the correct output by switching to the 36 element array but the math says it should be 72 elements.

Thanks for any insight.
Mick


Last edited by mkent on Thu Jun 09, 2011 7:53 pm; edited 1 time in total
mkent



Joined: 09 Sep 2003
Posts: 37
Location: TN, USA

View user's profile Send private message

PostPosted: Thu Jun 09, 2011 7:49 pm     Reply with quote

A picture of the DAC output. The first 540 degrees represents a high and is at 3600 Hz, the next 360 degrees repesents a low and is at 2400 Hz. Note the cursors and the readout.



Mick[/img]
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